1 day old

Senior Electronics Engineer-2

San Jose, CA
  • Job Code
Company ASML

Job Title: Senior Electronics Engineer-2

JobID: 12540-131221#10174006

Location: San Jose, CA, 95115, USA

Description: ## Introduction

ASML brings together the most creative minds in science and technology to develop lithography machines that are key to producing faster, cheaper, more energy-efficient microchips. We design, develop, integrate, market and service these advanced machines, which enable our customers - the world’s leading chipmakers – to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics. Our headquarters are in Veldhoven, the Netherlands, and we have 18 office locations around the United States including main offices in Wilton, CT, Chandler, AZ and San Jose, CA.

We are proud of bringing together the brightest minds all over the world to tackle the most challenging problems in making faster and smaller chips. As part of our team, you will have the opportunity to go beyond yourself in developing more advanced techniques and push the technology boundaries.

ASML is set for growth in Silicon Valley, following the acquisition of HMI in November 2016. HMI has a large R&D; centre in San Jose, the heart of Silicon Valley, and this centre is looking for dozens of technologists to take on two exciting product innovations: pattern fidelity metrology and multiple e-beam metrology. HMI designed its first e-beam inspection tool from scratch when it was founded 20 years ago and has grown to become the technology leader in e-beam wafer inspection technology, employing over 700 staff in Taiwan, China and the United States. By combining knowledge and resources, we will boost R&D; activities, both at ASML and HMI.

## Job Mission

* Develop and design FPGA firmware architecture based on system specifications and other requirements.
* Develop detailed FPGA implementation and manage it.
* Work with hardware design engineers to improve the system performance.

## Job Description

Main responsibility:

* Scanning Control;
* Image sampling and processing;
* High speed transmission interface R&D;
* PCIE and DMA R&D;
* Universal low speed interface R&D; and test.

## Education

PHD, MSEE or BSEE with equivalent experience.

## Experience

* Strong skill and knowledge in FPGA HDL design, experience with RTL design, simulation, constraining, synthesis and timing analysis using Quartus in VHDL or Verilog.
* Good hardware knowledge, experience of board level circuits design and debug.
* Good C programming skills related to embedded systems.
* Excellent oral and written communication skills.

*Location:* San Jose - CA, US

*Level:* Bachelor

*Experience:* 2-5 Professional

*Available since:* 2017-09-05

*Functional area:* General Management

*Background:* Electronics

*Reference:* US03068


  • Engineering

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San Jose, CA

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