1 day old

Engineer, Principal Manager CAD DFT

Qualcomm Inc.
Bangalore


Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

Job Overview:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.

DFT CAD Flow Development, Deployment and Support.

As a person hired into this role you will be Define, Develop and Deploy DFT CAD Solutions in the areas of DFT Implementation, Test Vector Generation and Silicon Bringup. We believe in fast paced development, Innovation and partnership across teams and sites to deliver CAD Solutions to enable Best In Class Chipsets for a Connected world.

You will design, develop, deploy and support innovative Products, Methodology and Flows to enable Implementation, integration and verification of DFT logic designs at block/IP level and chip level while minimizing DFT impact on schedule, timing, area, and power. You are expected to participate in all aspects of software development with enthusiasm: collecting requirements, writing specifications, coding, testing and supporting customers.
Plan and implement tool flows to meet test requirements for high volume manufacturing, including at-speed scan test with compression, Logic BIST, Memory BIST, and boundary scan, while utilizing industry standards Create flows/methods to enable timing constraints for all DFT modes and collaborate with physical design teams to close timing and physical design signoff requirements.
Enable automation to generate production quality manufacturing test patterns, and assist with bring-up and debug on Automated Test Equipment (ATE).
Providing tool and flow training to design engineers Evaluate and Qualify DFT tools and Working with EDA vendors on resolution of tool and flow issues


Minimum Qualifications
A bachelor's or Masters degree in Engineering with 3-10 years of professional work experience in the area of DFT CAD Development
Programming Expertise with C,C++,Perl, Python
Strong abstraction and algorithmic skills.
Experience of working with a large code base.
Experience with Flow Architecture and Tool design and Development.
Knowledge of DFT concepts
Ability to work in an international team, dynamic environment
Ability to learn and adapt to new tools and methodologies.
Ability to do multi-tasking & work on several high priority projects in parallel.
Excellent problem solving skills
Excellent communication and team work skills and good English is required

Additional Qualifications
Knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis
Knowledge and hands on experience in MBIST insertion and Memory test validation
Knowledge in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations
Experience in RTL and Gate level simulations of scan and MBIST test vectors
Working Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TetraMax)
Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus



Minimum Qualifications
Bachelors degree
5 Plus years experience


Preferred Qualifications
DFT CAD Flow Development, Deployment and Support.

As a person hired into this role you will be Define, Develop and Deploy DFT CAD Solutions in the areas of DFT Implementation, Test Vector Generation and Silicon Bringup. We believe in fast paced development, Innovation and partnership across teams and sites to deliver CAD Solutions to enable Best In Class Chipsets for a Connected world.

You will design, develop, deploy and support innovative Products, Methodology and Flows to enable Implementation, integration and verification of DFT logic designs at block/IP level and chip level while minimizing DFT impact on schedule, timing, area, and power. You are expected to participate in all aspects of software development with enthusiasm: collecting requirements, writing specifications, coding, testing and supporting customers.
Plan and implement tool flows to meet test requirements for high volume manufacturing, including at-speed scan test with compression, Logic BIST, Memory BIST, and boundary scan, while utilizing industry standards Create flows/methods to enable timing constraints for all DFT modes and collaborate with physical design teams to close timing and physical design signoff requirements.
Enable automation to generate production quality manufacturing test patterns, and assist with bring-up and debug on Automated Test Equipment (ATE).
Providing tool and flow training to design engineers Evaluate and Qualify DFT tools and Working with EDA vendors on resolution of tool and flow issues


Minimum Qualifications
A bachelor's or Masters degree in Engineering with 3-10 years of professional work experience in the area of DFT CAD Development
Programming Expertise with C,C++,Perl, Python
Strong abstraction and algorithmic skills.
Experience of working with a large code base.
Experience with Flow Architecture and Tool design and Development.
Knowledge of DFT concepts
Ability to work in an international team, dynamic environment
Ability to learn and adapt to new tools and methodologies.
Ability to do multi-tasking & work on several high priority projects in parallel.
Excellent problem solving skills
Excellent communication and team work skills and good English is required

Additional Qualifications
Knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis
Knowledge and hands on experience in MBIST insertion and Memory test validation
Knowledge in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations
Experience in RTL and Gate level simulations of scan and MBIST test vectors
Working Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TetraMax)
Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus

1980210

Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email toaccommodationsupport

To all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.


Our Work Experience is the combination of everything that's unique about us: our culture, our core values, our company meetings, our commitment to sustainability, our recognition programs, but most importantly, it's our people. Our employees are self-disciplined, hard working, curious, trustworthy, humble, and truthful. They make choices according to what is best for the team, they live for opportunities to collaborate and make a difference, and they make us the #1 Top Workplace in the area.

Employment Notices for US-based Job Postings

Equal Employment Opportunity

"EEO is the Law" Poster Supplement

Pay Transparency NonDiscrimination Provision

Employee Polygraph Protection Act

Family Medical Leave Act

Rights of Pregnant Employees

Discrimination and Harassment

California Family Rights Act

Prepare and succeed

Qualcomm Interview FAQs

Employment Fraud Alert

We have received reports of employment scams that seek financial or personal information from job candidates. Please note these communications are fraudulent. Click here to view our Employment Fraud Alert.

Categories

Posted: 2021-02-23 Expires: 2021-03-25

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

Engineer, Principal Manager CAD DFT

Qualcomm Inc.
Bangalore

Join us to start saving your Favorite Jobs!

Sign In Create Account
Powered ByCareerCast