6 hours
2018-07-162018-08-15

Senior CAD Engineer

Xilinx
  • Job Code
    154785
Job Title: Senior CAD Engineer 154785

Primary Location India-India-Hyderabad
Job: CAD/Layout
Schedule: Full-time
Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team! 

 

This position for a CAD Engineer will be critical to shaping the next generation of FPGA products from Xilinx, the leader in FPGAs.  It requires interfacing with large design teams across the globe and owning methodology development for next generation synthesis, place and route flows. Successful candidate would be responsible for automation of PnR flows and methodologies for the 7nm technology node as well as work closely with the EDA vendors to identify innovative solutions and track methodology issues.
 
Role and Responsibilities:
·         Responsible for developing Place and Route methodologies for various designs at the 7nm technology node
·         Script out utilities to automate different pieces of the implementation flow
·         Support the design team through multiple PnR flow stages
Tool Expertise Required:
·         Good control over scripting languages like PERL, TCL etc and debug capabilities
·         Automation mindset
·         Hands on experience in place and route flows and STA tools
·         Hands on experience with physical verification tools such as Calibre
 
 Qualifications and requirements:
·         Master’s/Bachelor’s Degree in Electrical/Electronics engineering
·         5-8 years of experience in PnR CAD flow and methodology development
·         Should be proficient in Tcl/Perl/XML/Python
·        Work closely with design teams to support multiple areas through RTL to GDSII implementation
·         Strong problem solving skills and analytical thinking
·         Excellent communication skills
 
 



Qualifications

This position for a CAD Engineer will be critical to shaping the next generation of FPGA products from Xilinx, the leader in FPGAs.  It requires interfacing with large design teams across the globe and owning methodology development for next generation synthesis, place and route flows. Successful candidate would be responsible for automation of PnR flows and methodologies for the 7nm technology node as well as work closely with the EDA vendors to identify innovative solutions and track methodology issues.

 Role and Responsibilities:

·         Responsible for developing Place and Route methodologies for various designs at the 7nm technology node

·         Script out utilities to automate different pieces of the implementation flow

·         Support the design team through multiple PnR flow stages

Tool Expertise Required:

·         Good control over scripting languages like PERL, TCL etc and debug capabilities

·         Automation mindset

·         Hands on experience in place and route flows and STA tools

·         Hands on experience with physical verification tools such as Calibre

 

 Qualifications and requirements:

·         Master’s/Bachelor’s Degree in Electrical/Electronics engineering

·         5-8 years of experience in PnR CAD flow and methodology development

·         Should be proficient in Tcl/Perl/XML/Python

·        Work closely with design teams to support multiple areas through RTL to GDSII implementation

·         Strong problem solving skills and analytical thinking

·         Excellent communication skills

 

 


Job Posting: Feb 12, 2018, 1:35:18 AM


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Xilinx

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